Today the “data deluge” problem brings current computational machines in the struggle to achieve Exascale performance by 2020. As a consequence, the respective energy requirements as we approach the exascale era are setting another alarming limitation. In order to meet the Exascale milestone within the gross 20MW power envelope, an energy efficiency of less than 20pJ per floating point operation would be required, but a modern CPU and a modern GPU consume around 1.7nJ and 140pJ per floating-point operation, respectively.

Current architectures rely to a large degree on data movement as shown in the figure above, without having the necessary infrastructure to support this in an energy-efficient way. The interconnection cost of moving 256 bits from a memory located 10mm away is 256pJ. Accessing 256 bits of operand from an 8-kB on-chip Static RAM (SRAM) cache requires apprx. 50pJ while the cost of external DRAM access exceeds 16nJ. This means that today fetching operands is much more energy-consuming than computing on them.

At the same time Memory bandwidth continues to be a critical bottleneck, with the most efficient way for improvement still relying on the deployment of wider memory buses. The turn of computing into strongly heterogeneous and parallel settings, where throughput becomes a key factor for increasing processing power urges for a solution to this problem without, however, sacrificing additional chip real-estate for caching and interconnect purposes.

ORION aims to build upon the emergence of optical hardware towards radically transforming the way memory is organized in a computing environment. ORION proposes a novel solution by completely separating processor chips from interconnect, cache memory and DRAM elements, leading to a high-throughput, reconfigurable and modular setting where processing cores, cache memories, DRAMs and interconnects will comprise disjoint modules and can dynamically re-distribute data, tasks and resources. For this purpose, ORION will blend innovations across a highly interdisciplinary and broad area spanning from photonics through cache schemes up to computing architectures.